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Công việc Create simple game xilinx:

Mã	Dự án/Cuộc thi	Mô tả	Lượt đặt giá/Bài dự thi	Kĩ năng		Bắt đầu		Kết thúc	Giá (VND)																					loại hình

Dự án/Cuộc thi	Mô tả	Lượt đặt giá/Bài dự thi	Kĩ năng	Bắt đầu	Kết thúc	Giá (VND)
Verilog Code for Fast Fourier Transform	I am having difficulties in finishing my final year project. I would like to do Verilog codes on Fast Fourier Transform processor for both Radix-2 and Radix-4 of 8-bit by using Xilinx software. I need to get the test values design along with its output waveforms. I am working on a project of 'Design and Simulation of a Fast Fourier Transform Processor using Verilog'. However, I am not...	6	Kĩ thuật, Điện tử, Verilog / VHDL, Kĩ thuật điện, FPGA	Apr 25, 2018	Hôm nay6n 23g	₫3482591
Modify a Demo(FPGA: Xilinx Basys3 Language:Verilog)	I need someone to help me modify a Demo(FPGA: Xilinx Basys3 Language:Verilog) which is a object tracking system based on a pan-tilt. I think the modification won't be a big task, because the imaging processing algorithm works well, the need of modification is in controling two servos, especilly in getting back servos' position. The original demo get servos' position by using fou...	5	Verilog / VHDL, Vi điều khiển, Kĩ thuật điện, Phần mềm cài sẵn, FPGA	Apr 23, 2018	Apr 23, 20185n 9g	₫4113636
Tcp sending on FPGA using verilog xgmii	Tcp sending on FPGA using verilog xgmii xilinx vivado	5	Verilog / VHDL	Apr 19, 2018	Apr 19, 201822g 43t	₫8568182
Signal Peak Detector, Digital Design - Command Processor	I am currently working on peak detector using VHDL entry (Modelsim and Xilinx), to design logic design in FPGAs to fulfill my free time. There are two parts, which are command processor and data processor. However, I have completed the data processor part, so only command processor left and I have no idea how to complete it. I plan to accomplish this task by next Sunday, 22nd April before I starte...	7	Kĩ thuật, Điện tử, Matlab and Mathematica, Verilog / VHDL, Kĩ thuật điện	Apr 17, 2018	Apr 17, 2018Đã kết thúc	₫1040354
Xilinx	Develop a circuit of SDES(Simplified data enryption standard)	2	Điện tử, Thiết kế vi mạch	Apr 11, 2018	Apr 11, 2018Đã kết thúc	₫3085604
finite state machine synthesis	need to develop a vhdl code, synthesize the design to get corresponding simulation waveforms by using xilinx (vivado/ise) software.	12	Kĩ thuật, Verilog / VHDL, Vi điều khiển, Kiến trúc phần mềm, FPGA	Apr 2, 2018	Apr 2, 2018Đã kết thúc	₫840909
FPGA Programming Crypto Miner	I am looking for someone that can program or port an existing Windows or Linux mining program for AMD GPU's to a Xilinx Kintex-7 FPGA I will provide details and Github privately	8	Lập trình C, Điện tử, Verilog / VHDL, Vi điều khiển, Kĩ thuật điện	Mar 30, 2018	Mar 30, 2018Đã kết thúc	₫33590909
Altera to Xilinx Vivado FPGA port	Need a freelancer to port an old Altera(maybe even Xilinx ISE) project into Xilinx Vivado and provide the bitstream to run on a Digilint Zybo Zynq-7010. May be done very quickly since many files are already in a ISE project. Resources: [url removed, login to view] [url removed, login to view] [url removed, login to view] [url removed, login to view] [url removed, login to view] [url remove...	8	Lập trình C, Python, Vi điều khiển, Kiến trúc phần mềm, LabVIEW	Mar 29, 2018	Mar 29, 2018Đã kết thúc	₫3840909
FPGA NIST5 Cryptocurrency miner	I am looking for a person who will make FPGA NIST5 Cryptocurrency miner. I need full unrolled NIST5 core. NIST5: blake512 -> groest512 -> jh512 -> keccak512 -> skein512 Perfect performance: 1x (Example: FPGA at 400MHz clock generates 400Mega Hash / secound) Language: VHDL FPGA: Xilinx 7 series	6	Verilog / VHDL, FPGA	Mar 23, 2018	Mar 23, 2018Đã kết thúc	₫16818182
vhdl programming in Xilinx vivado	write vhdl code for : 1. (8 16bit register) register file/ a gate-level vhdl models for functional unit. + test benches and simulations. 2. implement a microprogrammed instruction set processor extended on part 1. more details to be given in chat. deadline 28/03/2018	6	Kĩ thuật, Verilog / VHDL, Kĩ thuật điện, Lắp ráp	Mar 21, 2018	Mar 21, 2018Đã kết thúc	₫3909091
Customize lwIP for FreeRTOS for networking swithching	Using a FreeRTOS and lwIP (TCP/IP) on Xilinx ZynQ SoC. Tool is Vivado 16.2 (SDK). At Ethernet interface (PS of ZynQ FPGA), mixed traffic is to be differentiated based on pre-defined IP and Ports and IP packets are to be routed to respective application. Rest all traffic (RAW Ethernet Frames) to be passed on to PL part (FPGA). This can be done by keeping Ethernet packets in DDR. And then AXI int...	3	Lập trình C, Điện tử, Lập trình C++	Mar 7, 2018	Mar 7, 2018Đã kết thúc	₫9545455
Xilinx DDR3 controllers development for Frame buffer (one frame delay)	• Target DDR3 controllers development for Frame buffer (one frame delay) • Features Frame Buffer input: 1920 x 1080@60 fps, YUV 4:2:2 output: 1920 x 1080@60fps, YUV 4:2:2 • HW Platform DDR3 controller for Xilinx Zynq-7000 or 7-series FPGA • Design output Verilog DDR3 controller source codes, testbench and document	6	Điện tử, Verilog / VHDL, Vi điều khiển, Kĩ thuật điện, FPGA	Mar 3, 2018	Mar 3, 2018Đã kết thúc	₫49659091
QPSK FPGA Demodulator xilinx (Source code required)	We need to develop a QPSK demodulator FPGA xilinx based.	16	Điện tử, Verilog / VHDL, Vi điều khiển, Kĩ thuật điện, FPGA	Feb 22, 2018	Feb 22, 2018Đã kết thúc	₫16111089
AI Based Chip Design For video codec h.264 for face recognition in cloud and verify output on Xilinx FPGA Kit	write an AI Algorithm for video codec h.264 and design Chip, after design chip of AI Based video codec h.264 you can verify out put on Xilinx FPGA Kit for face recognition in cloud iam expecting this project to finish on or before 26th feb2018 regards D RAMANNA [Removed by Freelancer.com Admin for offsiting - please see Section 13 of our Terms and Conditions] BANGALORE-INDIA	4	Thiết kế đồ họa, Thiết kế logo, Điện tử, Verilog / VHDL, Kĩ thuật điện	Feb 18, 2018	Feb 18, 2018Đã kết thúc	₫3704545
Project for Jamal B. -- 18/02/18 20:19:29	AI Based Chip design for video codec h.264 for face recognition in cloud and verify output on Xilinx FPGA board.	1	Không dây, Điện tử, Vi điều khiển, Kĩ thuật điện, Phần mềm cài sẵn,	Feb 18, 2018	Feb 18, 2018Đã kết thúc	₫1909091
Design a chip for AI Based video codec h.264 for face recognition in cloud	AIM: DESIGN A CHIP FOR AI BASED VIDEO CODEC H.264 FOR FACE RECOGNITION IN CLOUD AND INTEGRATE WITH XILINX FPGA BOARD TEST OUTPUT. IAM EXPECTING TOTAL TIME PERIOD IS 6DAYS(25/02/2018) REGARDS D RAMANNA BANGALORE-INDIA [Removed by Freelancer.com admin]	2	Linux, Thiết kế vi mạch	Feb 17, 2018	Feb 17, 2018Đã kết thúc	₫522727
Project for channabasu4	AI based chip design for video codec h.264 and test on Xilinx FPGA kit(Raspberry) Regards D Ramanna pH:8247578666	1	PCB Layout,	Feb 16, 2018	Feb 16, 2018Đã kết thúc	₫3477273
Chip design for AI based video codec h.264 with custom FPGA on Xilinx boards for face recognition in cloud	AI Based Chip design for video codec h.264 on custom FPGA boards for face recognition in cloud expecting AI algorithm, os ,execution, chip design and testing on FPGA board Regards D Ramanna Removed by Admin	0	Chrome OS	Feb 14, 2018	Feb 14, 2018Đã kết thúc	-
AI Based Chip design for video codec h.264 with custom FPGA on Xilinx packages	Chip design for AI based video codec h.264 with custom FPGA on Xilinx packages which is face recognition in cloud also. Iam expecting coding, execution, chip design&testing on custom FPGA board [Removed by Freelancer.com Admin]	2	Linux, Thiết kế vi mạch	Feb 14, 2018	Feb 14, 2018Đã kết thúc	₫2704545
Design a chip for AI Based video codec h.264 for face recognition in cloud	Chip design of custom FPGA with xilinx packages for AI based video codec h.264 for face recognition in cloud	1	Linux, Thiết kế vi mạch	Feb 14, 2018	Feb 14, 2018Đã kết thúc	₫431818

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