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    1,659 cyclon vhdl project công việc được tìm thấy, giá USD
    $202 Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    9 lượt đặt giá
    i neeb vhdl project Đã kết thúc left

    i need vhdl project for fpga bord i need skeleton and can move

    $24 (Avg Bid)
    $24 Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    14 lượt đặt giá
    FPGA ALTERA - VHDL project Đã kết thúc left

    Need help developing a face detection system with the DE2-115 board and OV7670. I already developed the code for the face detection but in MatLab.

    $220 (Avg Bid)
    $220 Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    14 lượt đặt giá

    i want to realize the transfer function on fpga so any one with knowledge of vhdl and quartus tool can bid Thank you

    $37 (Avg Bid)
    $37 Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    6 lượt đặt giá
    vhdl project Đã kết thúc left

    I need you to implement a vcdl design project

    $72 (Avg Bid)
    $72 Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    16 lượt đặt giá

    ...in der Digital- / Analotechnik - Kenntnisse von Simulations- und Prüfumgebungen - Kenntnisse mit technischer Dokumentation/Nachweisführung. Technisch: - OrCAD, PSpice, FPGA/VHDL, C++ - DO-254, MIL-STD-1553...

    $5850 (Avg Bid)
    $5850 Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    3 lượt đặt giá
    Tic Tac Toe in VHDL Đã kết thúc left

    I am looking someone who can fix the errors of the game tic tac toe in VHDL for DE2-115 and prepare report.

    $75 (Avg Bid)
    $75 Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    4 lượt đặt giá

    I need you to develop some VHDL designs for me. I would like this software to be developed in VHDL hardware descriptive language. With a  VHDL design and simulation

    $251 (Avg Bid)
    $251 Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    3 lượt đặt giá

    this is my brief description of my project and please only serious people who would like to work and help me make a bid MY FPGA board is DEO nano SOC CYCLONE 5 1. reading an anolog signal (adc is available on board )ltc2308 is the adc which is available on fpga a board 2. realization of PID controller on FPGA 3. realization of process module on fpga

    $366 (Avg Bid)
    $366 Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    2 lượt đặt giá

    ...showed is arrogance and negligence after accepting my project and asked me to create a milestone and cancelled it and made me to wait for 3 days without answering please guys kindly dont get fooled with such experienced guys and ruin your money and time. and this is my brief description of my project and please only serious people who would like to work

    $58 - $140 / hr
    $58 - $140 / hr
    0 lượt đặt giá

    i will explain in brief when we discuss

    $16 / hr (Avg Bid)
    $16 / hr Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    12 lượt đặt giá
    VHDL coding Đã kết thúc left

    HDL coding from block diagram and pseudo algorithm

    $25 (Avg Bid)
    $25 Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    5 lượt đặt giá
    Project using VHDL for FPGA Đã kết thúc left

    Develop a musical bell that will play a selected and programmed song in the FPGA.

    $86 (Avg Bid)
    $86 Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    4 lượt đặt giá

    Hi, I have opencv python programs want to implement them on the ZYNQ SoC. To be in precise want to implement custom object detection(using opencv, tensorflow)...implement them on the ZYNQ SoC. To be in precise want to implement custom object detection(using opencv, tensorflow) on to ZYNQ board. And also converting the python program to VHDL/Verilog.

    $132 (Avg Bid)
    $132 Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    7 lượt đặt giá
    VHDL expert needed Đã kết thúc left

    Expert in VHDL needed to work on a code

    $13 / hr (Avg Bid)
    $13 / hr Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    14 lượt đặt giá
    Code Conversion Đã kết thúc left

    Small project to write in VHDL

    $111 (Avg Bid)
    $111 Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    24 lượt đặt giá

    Implement an algorithm in vhdl done in Matlab using System Generator

    $97 (Avg Bid)
    $97 Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    11 lượt đặt giá

    ...5ms / 20ns = 125000 dcycle_mid = (dcycle_max – dcycle_min) / 2 = 75000 Για την περιστροφή του servo θα χρησιμοποιήσουμε τα δύο κουμπιά π&omic...

    $40 (Avg Bid)
    $40 Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    1 lượt đặt giá

    1. Create a top level VHDL file for the project. VHDL code should be well formatted and commented. 2. Add two instantiations of a sync counter to the top level that are customized for the horizontal and vertical sync signals 3. Adapt the tesbench from homework 2 to simulate the top level file. Simulations should be annotated to depict events important

    $77 (Avg Bid)
    $77 Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    6 lượt đặt giá

    Necesito hacer un programa en VHDL de un reloj (formato 24hs), con cronometro y con alarma. Cuando cambio a cada uno. no se debe perder la cuenta de la hora, cronometro o la alarma seteada. El reloj, la alarma y el cronometro se debe poder cargar/modificar manualmente. Detención y reinicio del cronometro. Cuando la hora del alarma coincida con el clock

    $180 (Avg Bid)
    $180 Gi\u00e1 \u0111\u1eb7t trung b\u00ecnh
    1 lượt đặt giá