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Viết Inverse kinematics chạy trên FPGA của Xilinx

Hi Duc D., tôi cần giúp làm FPGA Altera. Nếu giúp được, xin LL với tôi. Za lo, vi bơ của tôi là bay sau khong chin bay nam chin ba bay tam. Locson

Hi Khanh L., tôi cần giúp làm FPGA Altera. Nếu giúp được, xin LL với tôi. Za lo, vi bơ của tôi là bay sau khong chin bay nam chin ba bay tam. Locson

Hi Kevin N., tôi cần giúp làm FPGA Altera. Nếu giúp được, xin LL với tôi. Za lo, vi bơ của tôi là bay sau khong chin bay nam chin ba bay tam. Locson

Hi Tiep N., tôi cần giúp làm FPGA Altera. Nếu giúp được, xin LL với tôi. Za lo, vi bơ của tôi là bay sau khong chin bay nam chin ba bay tam. Locson

Hi Lic T., tôi cần giúp làm FPGA Altera. Nếu giúp được, xin LL với tôi. Za lo, vi bơ của tôi là bay sau khong chin bay nam chin ba bay tam. Locson

Hi Quang T., tôi cần giúp làm FPGA Altera. Nếu giúp được, xin LL với tôi. Za lo, vi bơ của tôi là bay sau khong chin bay nam chin ba bay tam. Locson

Huy, tôi cần giúp làm FPGA Altera. Nếu giúp được, xin LL với tôi. Za lo, vi bơ của tôi là bay sau khong chin bay nam chin ba bay tam. Locson

Hi Hong L., tôi cần giúp làm FPGA Altera. Nếu giúp được, xin LL với tôi. Za lo, vi bơ của tôi là bay sau khong chin bay nam chin ba bay tam. Locson

Van Phu, tôi cần giúp làm FPGA Altera. Nếu giúp được, xin LL với tôi. Za lo, vi bơ của tôi là mot bay sau khong chin bay nam chin ba bay tam. Locson

Quan, tôi cần giúp làm FPGA Altera. Nếu giúp được, xin LL với tôi. Za lo, vi bơ của tôi là mot bay sau khong chin bay nam chin ba bay tam. Locson

Long, tôi cần giúp làm FPGA Altera. Nếu giúp được, xin LL với tôi. Za lo, vi bơ của tôi là bay sau khong chin bay nam chin ba bay tam. Locson

Long, ti6i cần giúp làm FPGA Altera. Nếu giúp được, xin LL với tôi. Za lo tôi là bay sau khong chin bay nam chin ba bay tam. Locson

FM transmitter(Xilinx)-fpgaFM transmitter(Xilinx)-fpgaFM transmitter(Xilinx)-fpga

I need a simple circuit using common hardware parts that measures the high width of a TTL pulse and if it exceeds 3 seconds a logic output is set high as an alarm. If the pulse becomes shorter than 3 seconds the logic output is set low so alarm is turned off. A 32768Hz clock is available. Maybe a ...parts that measures the high width of a TTL pulse and if it exceeds 3 seconds a logic output is set high as an alarm. If the pulse becomes shorter than 3 seconds the logic output is set low so alarm is turned off. A 32768Hz clock is available. Maybe a 74HC series binary counter might work. Or specify your own clock generator. We want simple 74HC logic, or 4000 logic. Not MCU and not FPGA. When we choose the circuit we will build it to confirm it works before award...

Project Title: Need help in creating resume for RTL design engineer Role/Position: RTL Design Engineer Skills/Experiences to Highlight: - Knowledge of RTL design principles and methodologies - Proficiency in hardware description languages such as Verilog or VHDL - Familiarity with ASIC/FPGA design flow and tools - Understanding of digital design concepts and logic synthesis - Experience with simulation and verification tools - Strong problem-solving and analytical skills - Ability to work in a team and meet project deadlines Level of Experience: Entry Level Ideal Skills and Experience for the Job: - Bachelor's or Master's degree in Electrical Engineering or related field - Coursework or projects related to RTL design - Internship or co-op experience in the field of dig...

Project Title: Need help in creating resume for RTL design engineer Role/Position: RTL Design Engineer Skills/Experiences to Highlight: - Knowledge of RTL design principles and methodologies - Proficiency in hardware description languages such as Verilog or VHDL - Familiarity with ASIC/FPGA design flow and tools - Understanding of digital design concepts and logic synthesis - Experience with simulation and verification tools - Strong problem-solving and analytical skills - Ability to work in a team and meet project deadlines Level of Experience: Entry Level Ideal Skills and Experience for the Job: - Bachelor's or Master's degree in Electrical Engineering or related field - Coursework or projects related to RTL design - Internship or co-op experience in the field of dig...

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Project Title: NTT hardware implementation verilog I am looking for a freelancer who can help me with the implementation of a Radix-2 NTT hardware in Verilog. Requirements: - Strong experience in Verilog programming - Knowledge of Radix-2 NTT algorithm - Familiarity with cryptography and encryption techniques The ideal candidate should: - Have experience in FPGA or ASIC technology - Be able to suggest suitable FPGA or ASIC technology for the implementation - Understand the specific requirements of cryptography in the context of NTT implementation This project is focused on the implementation of a Radix-2 NTT hardware for the purpose of cryptography. If you have the necessary skills and experience, please submit your proposal.

What is the target device for the custom firmware? DMA FPGA XILINIX 7 FPGA / XC7K325T FPGA high-performance chips I am looking for an experienced freelancer to develop custom firmware for a specific DMA card model, PCILeech (Terminator Z1 specifically) + other squirrel PCILeech cards. The firmware needs to be compatible with EAC, BE, Faceit, and Vanguard anti-cheats. It has to be able to disguise my DMA device exactly like another device with the same config space and return the same buffers as the second device we are trying to emulate, basically I need it to act and look exactly like another PCIe device. Requirements and Features: - I am open to suggestions for specific requirements and features for the firmware. - The firmware should be optimized for gaming purpo...

FPGA Dma board Custom Firmware Im looking to get a firmware for my dma card that bypasses all anti cheats and is fully emulated. Details: Artix 7 fpga dma card Example (link):

FPGA Dma board Custom Firmware Im looking to get a firmware for my dma card that bypasses all anti cheats and is fully emulated. Details: Artix 7 fpga dma card Example (link):

Description: Create a Hardware-Software Codesign version of the k-mean clustering algorithm K-means clustering is a popular data mining algorithm that partitions n samples into k clusters (note: the k-nearest neighbor classifier algorithm used in machine learning can leverage the cluster centers produced by the k-means clustering algorithm). The problem is in general NP-hard but heuristic algorithms have been developed that quickly converge to a local optimum solution. We will consider one of those algorithms in this project. I have provided a C code version of the k-means clustering algorithm, and a Vivado block diagram and memory layout (explained below) that you will use as a starting point. You will need to study the C version and then decide which components to implement as a VHDL mod...

...is experienced in implementing Ethernet on the ZCU216 Ultrascale+ Xilinx RFSoC board using Petalinux. The ideal candidate should have the following skills and experience: - Strong knowledge and experience in Ethernet protocols, such as Ethernet/IP, Ethernet TCP/IP, and Ethernet UDP - Familiarity with the ZCU216 Ultrascale+ Xilinx RFSoC board and Petalinux - Experience in implementing Ethernet on FPGA-based systems - Ability to work with constraints and specific requirements related to Ethernet implementation - Understanding of networking principles and protocols -Ability to make ppt slides of task done in an orderly step manner. I can also provide you with some prior information regarding our task and some past work done on this ,which will make it even more easier for you. Su...

I have a SPARTAN 3 FPGA board and I need a project in C++ language that allows data to be sent to LEDs from the switches. The C++ project should be simple without calls to advanced libraries, understandable and with comments for each line of the program as much as possible, I have a base code file to start with that. The purpose is so that I can understand and add my own code later. For more details and related files, please send me a private message.

FPGA ML will share details later

using Artix 7 implement Master UFS protocol design for the UFS Host device, Feel free to contact who's have experince on Stroage's(emmc, ufs, nand e.t.c) Skills required : Verilog , VHDL , C

I am looking for a skilled FPGA developer who can integrate the IMX586/Equivalent camera with the Artix 7 FPGA( XC7A35T). The desired output of this integration is both image processing and video processing. The resolution and frame rate requirements are not specific, but I have a general idea and I am open to suggestions. In addition to the integration, I would like to incorporate additional feature to overlay time, GPS, and compass data in the image/video and send that to the LSM7002M RF IC and to BL618. Additional engineer will be provided for BL618 integration Ideal skills and experience for this project include: - Proficiency in FPGA development and integration - Experience with xilinx FPGA - Knowledge of image and video processing - Ability to imple...

I am looking for a freelance developer to help me with a project involving writing to a LCD 16x2 display on a basys 1 FPGA with an i2c interface (PCF8574A). I would like the programmer to use Verilog, but I don't have experience with FPGA programming and I am open to suggestions for content and/or functionality for the display. If you have experience with FPGA programming and think you are a good fit for this project, I'd love to hear from you!

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***PROJECT ONLY FOR EXPERIENCED DEVS*** Hello, I am looking for skilled programmers who can program LimeSDR Mini v2.2 . The goal is to make the LSM7002M pair with other LSM7002M and exchange...other LSM7002M and exchange data in the following ways: (I) Modulation – AM, FM, 4FSK (DMR) without AES (ii) AM, FM, 4FSK (DMR) with (AES 256 bits) (iii) Narrowband Waveform (25 kHz) for voice communication (iv) Data Rate atleast 1 Mbps for transfer of text messages,image transfer etc. (v) Interfacing the FPGA with external microcontroller (BL618/Equivalent). (vi) Making the FPGA getting into sleep mode during non operation and wake up on interupt from the external microcontroller. The FPGA will receive data from the external microcontroller which is linked with micro...

UART Transceiver to receive input and transmit output to and from text file. The UART transceiver has start and stop bits, no parity and has configurable baud rate. Receiver will receive a 45-bit input from a text file and placed in a fifo buffer. Input will be test vectors which will be operands for the unit in which it will be processed. The unit is already done. Fifo buffer will preferably be a DPRAM (or any type of RAM available in IPExpress that will be suitable). The unit will then get to instantiate the inputs needed from the fifo buffer. The unit will produce 21-bit output for each operation. The 21-bit output will be stored to another fifo buffer. The transmitter will then get the 21-bit output from the fifo buffer and will transmit it to an output text file where all output...

I am looking for a freelancer who can design an SDI HDMI system using Xilinx and Artix FPGA Device. The project requires the following: - The desired output resolution for the SDI HDMI design is HD-SDI and 3G-SDI. - The client specifically wants to use an Artix FPGA Device for the design. - The key functionality required for the design is video processing. Ideal Skills and Experience: - Proficiency in Xilinx and FPGA design. - Experience in designing SDI HDMI systems. - Strong knowledge of video processing technologies. - Familiarity with Artix FPGA Devices. If you have the necessary skills and experience, please bid on the project.

I am looking for someone who can provide me with an FPGA project in Verilog within a day, which should include the use of peripherals. Here are the details: Specific Peripherals: - UART - SPI - I2C Requirements and Constraints: - No specific requirements or constraints for the FPGA project Target Application: - Any application, such as data processing, signal processing, or control systems Ideal Skills and Experience: - Proficiency in Verilog and FPGA development - Experience with integrating peripherals into FPGA projects - Knowledge of UART, SPI, and I2C protocols If you have a Verilog FPGA project that includes the use of peripherals, please reach out to me. Thank you!

want to do this project: FPGA and k-mean clustering

I am in need of an intermediate FPGA VHDL designer who can assist me with designing a small module. This project requires someone with experience and expertise in VHDL programming for FPGAs. Skills and Experience: - Proficiency in VHDL programming for FPGAs - Experience with designing small modules - Strong understanding of FPGA architecture and design principles The project has a tight deadline, with completion expected within the next 1-2 weeks. Therefore, it is important for the freelancer to be able to work efficiently and deliver high-quality work within this timeframe. If you have the necessary skills and experience in FPGA VHDL design, and are able to meet the project requirements within the specified timeframe, I encourage you to apply for this project.

I am looking for someone to program an FPGA to execute a maximum ratio combining algorithm. The input signal format I need is digital, so there will be no analog signal involved. I don’t have specific FPGA model in mind, so I am open to any model that can work well with this project. I need the project to lead to a prototype outcome so I have a working model to then be able to make other changes as needed.

I'm looking for an experienced engineer to reprogram my Intel Cyclone V FPGA with existing code to enable it to perform signal processing functions. The code itself is already written and I'd like the engineer to take that code and use it to program my FPGA. This project requires an in-depth knowledge of FPGA technology and experience with the reprogramming process. I'm confident that the right person can complete this task effectively and efficiently. If you believe you are up to the challenge, I would love to hear from you and discuss the details of the project.

I am looking for someone with a programmer to program an Actel APA300PQ208I FPGA. I have the program but do not have the required programmer. If you have the correct programmer and are familiar with this device, I look forward to viewing your proposal.

High performance Digital Filter design . 1. VLSI implementation of Filter architecture. 2. Implementation of Filter architecture for all DSP functions on FPGA 3. Enhance the speed of Filter architecture using different technique and implementation on FPGA. 4 Reduce complexity, area, power consumption of filter architecture and implement on FPGA. 5 Minimum utilization of Look up Table, Flip Flops, slices etc for FPGA design of filter. 6) IP diagram 7) RTL design & Wave form for same 8) Fault Findings ( if possible and if any ) 9) If any other parameters which you can add to demonstrate results

I am looking to hire a freelancer to design an FPGA function generator using a Altera MAX 10 FPGA, 10M08SAE144C8G that produces a frequency of 10 MHz and above. The desired waveforms are sine, square, and triangle. This function generator should also have a single channel. If you think you have the skills to help me with this project, feel free to bid on it. Thank you!

I need help with the implementation of SHA 512 on an FPGA platform. I prefer to use the Xilinx platform, and I would like the programming language to be Verilog. I need the project to be completed in 2-3 days. I know this is a short timeline but I'm confident that with the right expert, it can be done. Please let me know if you have any questions or require more information.

Create a simple yet effective Smart Home Energy Monitor using your expertise in electrical engineering and FPGA/VHDL. This project aims to help working individuals monitor and optimize their home energy consumption. It can be both fun and practical.

...ASR 1004 rp2 Software and Romon,cpld,fpga Update Description: I am looking for a skilled professional who can assist me in updating the software and components of my Cisco ASR 1004 rp2 device. The main focus of this project is to update the software, Romon, cpld, and fpga. Current Software Version: I am not sure, please check for me. Specific Features/Fixes: I am not sure, please recommend. I am open to suggestions on the latest version and any specific features or fixes that would enhance the performance and functionality of my device. Backup: Yes, I have a backup of my current configuration and data. Ideal Skills and Experience: - Strong knowledge and experience with Cisco ASR 1004 rp2 devices - Expertise in updating software, Romon, cpld, and fpga componen...

I am looking for a skilled FPGA designer with experience in Xilinx Zynq7010 EBAZ Verilog to develop a permutation enumeration counter. The counter should have the following functionality and requirements: Functionality: - The counter should be able to increment indefinitely. - The counter shall initialize to the starting position on reset. - The counter shall toggle a minimum number of bits, like Grey Code. Requirements: - The project should be implemented using Verilog for Xilinx Zynq7010 EBAZ board. The Verilog function shall be parameterized PermCtr(K, N) - The counter should be designed to efficiently handle permutation enumeration. - The design should be optimized for performance and resource utilization. - If possible, I would like the counter to only enumerate the space be...

We are currectly looking for support to write a simple motor model in VHDL, that will be used to test our motor controller in FPGA. The motor model shall be as simple as possible and an equivalent Matlab/Octave/Python/C/C++ model would be desiderable and used to validate the VHDL model

Project Title: Accelerometer control Platform: FPGA Skills and Experience: - Proficiency in working with FPGA platforms - Strong understanding of accelerometer technology and control - Previous experience in developing projects using accelerometers Project Requirements: - Develop an accelerometer control system using an FPGA platform - The main function of the system should be orientation detection - Successful freelancers should include their past work showcasing their experience in working with accelerometers - Detailed project proposals are not necessary, but a clear understanding of the project requirements and the ability to meet deadlines is crucial Deliverables: - A fully functional accelerometer control system that accurately detects orientation - Documenta...

I am looking for a skilled freelancer to implement the JESD protocol on an FPGA device. The desired data rate for the implementation is 1 Gbps. Skills and Experience: - Experience in implementing the JESD protocol - Proficiency in FPGA development - Knowledge of high-speed data transfer and communication protocols Project Timeline: - The deadline for this project is within 1-2 weeks. Please provide examples of previous work and relevant experience when submitting your proposal.

I am looking to write and read memory from an EEPROM with a FPGA. The desired size for the EEPROM is 32kb and I need to use I2C as the communication protocol. I have a specified model for the FPGA, Cyclone IV. The project should also include the development of software code for the FPGA to control the EEPROM operations.