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Viết Inverse kinematics chạy trên FPGA của Xilinx

I am looking for an experienced VHDL programmer to help with a complex project. The timeline for this project is within a week, so it will require an experienced programmer who is able to work very quickly. I have detailed requirements that need to be satisfied, and I will be expecting a high-quality result. The project is an advanced level project, so I need someone who is comfortable working with complex VHDL code. If you think you can complete this project in the timeline given, please message me!

Project Description: Can you help me with a mini spectrum analyzer using FPGA the results will be on a pc screen with GUI that the user can put markers on and change the resolution, to make a spectrum analyzer with FFT algorithm on FPGA Using UI the user can control the span a put markers. The user will be able to change parameters in a user interface. The ADC is the sampling. The FPGA is going to calculate the FFT. The all idea is to mini spectrum analyzer (the measurement device). Block chain 1. ADC for sampling 2. FPGA to calculate the FFT and sent it to the pc display

I am looking for a freelancer to help with hardware verification. Specifically, I would like someone to verify a VHDL model od SHA3 in SystemVerilog using the UVM (Universal Verification Methodology). This project will also require executing fewer than 10 verification test cases. I have semi-built UVM template to send.

Hi I am writing the code for UVM verification environment for the AMBA AHB. I have all the code but facing problems integrating it with errors. It's to be done in vivado or questasim. It's in system verilog language. I need it in 2 days. We could discuss the price based on the difficulty and time you have to give on this.

My experience with deploying Caffe networks on FPGA boards is intermediate. I have prior experience with the Lattice Radiant software so I am ready to use it for this project. My specific task or outcome I want to achieve with this deployment is Image Classification using the ICE40UP5K FPGA with the iCE40 UltraPlus Breakout Board and Lattice Radiant software.

My project is about FPGA programming for control systems. I'm using the Altera Cyclone V board and the preferred programming language is Verilog. This project requires someone with experience in FPGA programming and the design of embedded systems. The programmer should be able to develop design flows for FPGA devices, debug them and modify existing designs for better performance. The knowledge of hardware description languages such as VHDL and Verilog is crucial, as they will be used for implementation and testing of the designs. Additionally, some knowledge of microcontrollers and communication protocols will be required. The right person for this job should have strong problem-solving skills, excellent coding and debugging capabilities, and a deep understanding ...

I am in need of an experienced and professional digital circuit designer to undertake a project involving Verilog coding, RTL verification, and FPGA implementation. Specifically, I need the Verilog coding to be at the intermediate level and it must meet specific requirements. The scope of this project is just Verilog coding running though Xilinx Vivado IDE. The successful applicant must have a good understanding of design flows to be implemented in Verilog, including synthesis and simulation techniques, as well as a thorough knowledge of all aspects of Verilog coding and digital circuit design. Experience with RTL verification and FPGA implementation will also be beneficial for this role. Ultimately, I am seeking an individual who is able to accurately an...

Project Title: Altera DE0 Board Programming Assistance Description: I am seeking a freelancer who can provide programming assistance for my Altera DE0 board project. I require expertise in VHDL programming language and the ability to modify existing code as well as start from scratch. Skills and Experience: The ideal candidate for this project should have: - Proficiency in VHDL programming language - Experience with Altera DE0 board - Strong troubleshooting and debugging skills - Knowledge of hardware design consultation Specific requirements: - Provide programming assistance for the Altera DE0 board - Modify existing code and develop new code from scratch - Troubleshoot and debug any issues that arise during the programming process - Provide hardware design consultation a...

I am looking for a skilled programmer to work on the video processing project involving the GS2962 and GS2961 ICs. Programming Language: - Proficiency in VHDL programming language is required for the IC programming. Functionality: - The primary function of the programmed ICs should be video processing. Hardware Compatibility: - The IC programming should be compatible with specific hardware that I have specified. Ideal Skills and Experience: - Strong knowledge and experience in programming with VHDL language. - Expertise in video processing and working with ICs. - Familiarity with GS2962 and GS2961 ICs. - Ability to ensure compatibility with specified hardware. Please provide examples of previous projects related to video processing and IC programming when submittin...

I am looking for a skilled ARM embedded freelancer to assi...Purpose of the Embedded System: - Personal project Hardware and Software Requirements: - I have specific requirements Ideal Skills and Experience: • Good grasp of fundamentals in Electronics Engineering, • Knowledge of digital electronics, VLSI, microprocessor architecture is a plus • Interest and experience in digital design and verification • Good understanding of Assembly-level programming, Verilog/VHDL • Proficient in C/C++, and scripting languages - Strong knowledge and experience in ARM microcontroller programming - Proficiency in real-time operating system (RTOS) development - Expertise in embedded system design and implementation - Familiarity with the specific hardware and softw...

I am looking for a skilled VS code extension developer who can create a language support extension for VHDL/Tcl. The ideal candidate should have experience in developing VS code extensions and have a strong understanding of external tasks. Requirements: - Proficiency in developing VS code extensions - Familiarity with the VS code extension development process - Ability to create a language support extension We have a language support extension already, that support VHDL and Tcl programming language. we need support to add tasks to the extension, to call external scripts. more details in following communications

I am looking for an experienced Verilog FPGA specialist to develop a reliable and efficient code for me. I do not have a specific functionality in mind, but I do need the code to have a clock frequency of less than 100MHz and fewer than 10 inputs and outputs. I would also like to ensure that the code is reliable and bug-free. If you have the expertise and skill set to deliver a high-quality solution, please contact me. I look forward to hearing from you!

Task description. we have a fork of a VScode extension which we customized (modifying snippets and some minor modification) This should be extended, we want to create an extension to be used internally to the company by every FPGA designer the extension shall support VHDL and Tcl (snippets and language syntaxes files are there already) Add Tcl language support (, ) but we would like to add the capability to call external Tcl scripts, right clicking on a vhd file in the Explorer Tab

I am looking for a skilled VS code extension developer who can create a language support extension for VHDL/Tcl. The ideal candidate should have experience in developing VS code extensions and have a strong understanding of external tasks. Requirements: - Proficiency in developing VS code extensions - Familiarity with the VS code extension development process - Ability to create a language support extension We have a language support extension already, that support VHDL and Tcl programming language. we need support to add tasks to the extension, to call external scripts. more details in following communications

Project Description: Build Pulp Snitch Cluster for Xilinx FPGA Board I am looking for a skilled and experienced developer to build a Pulp Snitch Cluster for my Xilinx FPGA Board. The ideal candidate should have expertise in System Verilog programming and configuration. Requirements: - Create a project, so Pulp Snitch Cluster can be built for Xilinx FPGA Board (Kria 260) using command line - Strong knowledge and experience in System Verilog programming and configuration Skills and Experience: - Expertise in System Verilog programming and configuration - Familiarity with Xilinx FPGA Boards - Familiarity with Xilinx tools (Vivado, etc..)

Project Title: Familiarize with pulp-platform/snitch Description: I'm seeking the one who can make me familiarized with pulp-platform/snitch. As of the output I expect to have : Completed documentation, from which I ...other tools) 2. Have understanding of how to run unit tests for given modules/cores/clusters/whatever 3. Embed custom IP into a snitch cluster; connect it to the axi crossbar, make it configurable by one of the cpu's/external tool 4. Use xilinx simulator for the purpose of unit tests (as a bonus) Note: latest version of the pulp/snitch must be used Skills and Experience: - Experiense with system verilog/ verilator/ system c/ make/ python - Experience with pulp-platform/snitch - Strong understanding of hardware and software integration - Communication and ...

Hi Edgar G., We need a tcl script to create block design from VHDL, FSM representation with states and transitions (with conditions), and process interconnection. This will be needed for documantation of VHDL projects consider splitting the diagram in sub diagrams for very dense diagrams, where the readability will be compromised byt the vast number of blocks and connections. the output shall be in an editable format.

Online forum dissemination and flyers The goal of this task is to "disseminate" our products and solutions on the web example: lets suppose we have our "axi register vhdl generator" module which generates VHDL module and package, C header and function to read/write registers, and html documentation. All this automatically from a tcl script or a web interface We would need to search on the web (in forum for instances) people looking for that thing and reply, sending a message, with the link to our solution This should be done, possibly, automatically, to capture the message as soon as it is published and reply immediately (replying after 2 years is not good, though it is still valid as the link will still be present and someone might go to serach and ...

I am in need of an FPGA VHDL expert for a design and implementation project. Skills and experience required: - Expertise in FPGA VHDL design and implementation - Strong knowledge of digital design and verification - Proficiency in troubleshooting and debugging FPGA designs Successful freelancers should include their experience in their application, showcasing their past work and relevant projects they have worked on. The desired turnaround time for the project is 2-4 weeks.

Project Description: I am looking for an experienced FPGA developer to implement a PL UART communication module on a Zynq FPGA. The project requires the following skills and experience: - FPGA development experience, specifically with Zynq FPGAs - Knowledge of UART communication protocols - Proficiency in HDL programming languages such as Verilog or VHDL - Ability to implement custom baud rates for UART communication - Experience with interrupt handling in FPGA designs - Strong understanding of intermediate level communication requirements The main objectives of the project are: - Implementing a PL UART module on a Zynq FPGA - Supporting selectable baud rates for UART communication - Triggering an interrupt after a successful transmission - Ensuring reliable and efficient ...

I need an experienced programmer to write FPGA test code for an upcomi...using. As this project requires moderate complexity, it is essential that the person I choose has a sound knowledge and understanding of FPGA programming. The code I am looking for is interface testing code for Audio IC (Audio Codac Part No: ADAU1761) with FPGA. Problem Statement:- We have to test the Audio interface of our customized FPGA board(FPGA PART No: XC7K325T-2FFG676I), so we need a VHDL/Verilog code for Audio IN/Out. Means, when we give input from Mic in audio in, same will be transferred to Audio out which we will hear from speaker. If you think you have the qualifications, tools and knowledge necessary to craft the code, please do not hesitate to bid on the project. I loo...

I am looking for an expert in Verilog and FPGA development to help with a project involving a UART. The project requires the following: Data Transfer Rate: - The required data transfer rate for the UART is up to 115200 bps. FPGA Board: - The specific FPGA board being used is Xilinx. Functionality: - The desired functionality of the UART is basic data transfer. Ideal Skills and Experience: - Strong knowledge and experience in Verilog and FPGA development. - Familiarity with Xilinx FPGA boards. - Experience in implementing UART functionality. - Understanding of basic data transfer protocols and techniques. If you have the expertise and skills required for this project, please submit your proposal.

The states are Idle state, Authentication state, menu state, withdraw state, deposit state, mini statement state, extra states can be added, if necessary. Moore implementation would be ideal as it is easy to implement, the model should be able to perform contain the following: 1)Withdraw 2)Deposit 3) Mini statement (up to 4 transactions) 4)Block the account for 24hrs if an incorrect pin is entered 3 times It is preferable if the Implementation of the STATES is done in different submodules and overall flow is controlled by the Main module containing the FSM. I/O utilization is recommended to be kept at minimum. Simulation with testbench simulation, Synthesis and Implementation is desired. Assume required power constraints and timing constraints for the model to work. Assume any other speci...

We used one design service comapny for one ASIC project, and they have completed the ASIC design and deliver...one design service comapny for one ASIC project, and they have completed the ASIC design and delivered whole design data with their environment to us. We don't have hands on ASIC design capability in house, we need somebody's help to re-build the design environment, install free window base verilg simulator. The consultant shoud re-build the design environment in our PC using window base free verilog simulator, and generate some vcd file for test house. Also, we need document that describes the design environment. I'm expcting it'll be 1 weeks project by experienced VLSI engineer, and shoud be done on site. we are located in Santa Clara, CA. we need ...

FPGA routes data between image sensor, ARM, display controller and usb controller. Initially designed using Lattice ICE40, but moved to Xilinx S7. Need help getting prototype up.

I need a verilog code which will run in Basys 3 board through Vivado software to control 4 different seven segment by different sw"s. For example Input result Sw1=1 0001 Sw1=0 0000 Sw1=1 0001 Sw2=1 0011 Sw3=1 0111 Sw4=1 1111 Thanks It must have the source file and constrain file

I am an EE engineer. I have lots of experience designing both a...language and C/C++ (both procedural and OOP). *for STM and nrf controllers Mbed OS could be one of the choices for programming the MCU. I have done lots of projects in the field of wireless communication and IoT using different wireless communication protocols like BLE, RF, WiFi (Cloud), etc. In the field of bit streaming, high-speed processing and ML, I am able to program both Xilinx and Altera in VHDL or C/C++ for Microblaze or NIOS II processors. For manufacturing purposes, I can provide component selection and BOM which suits your needs for a durable, efficient, and effective design. ABOUT YOUR PROJECT, I have done lots of similar projects before and can handle your project easily. We may discuss it more over cha...

I am looking for a skilled professional to design a fast division circuit with a required speed of less than 1 nanosecond. The technology that should be used for the circuit design is Verilog. As for specific requirements or limitations, I am open to suggestions and willing to work with a creative and experienced freelancer who can suggest the best solutions for this project. Ideal skills and experience for the job include proficiency in circuit design, experience in using Verilog, and the ability to work efficiently to meet a tight deadline.

We are looking for a skilled developer to create a webpage for code generation. The ideal candidate should have experience in web application, web design, and web development. The webpage will be used to generate VHDL modules for FPGA. The user will input certain parameters, and the webpage will output the corresponding code. The interface needs to be user-friendly and easy to navigate. We want to be able to add new modules, and the background code generator is already developed by us (Tcl scripts). The candidate shall propose a way to interface between the webpage and the Tcl script that generates the code. To apply for the position, please submit a detailed proposal outlining your experience and how you can help with the project. Please include links to past completed projects ...

First of all all the requirements on project documentation needed I am looking for a freelancer to help with the implementation of a single-cycle MIPS processor. The ideal candidate should have experience in digital logic design and computer architecture. The project requires the f...client in project documentation. Documentation: - The client requires in-depth analysis with diagrams in the documentation. - The documentation should cover all aspects of the implementation process, including design, testing on ModelSim simulator, and verification. Skills and experience: - Digital logic design - Computer architecture - Experience with MIPS instruction set - Experience with Verilog or HDL -Experience with ModelSim simulator The freelancer will be required to provide regular updates on...

We need support for TCL scripting, FPGA projects. Tcl sripts will be used to compile and simulate VHDL code, synthesize, P&R and analyze reports

Campera Electronic Systems is planning to introduce a Verification methodology in the company verification flow for VHDL designs. Previous experience on one of the "standard" VHDL verification methodologies (UVVM, OSVVM) or framework (Vunit) is requied.

I am seeking a VHDL expert to help me implement a control system using VHDL. The purpose of this project is to implement a control system, and the specific type of control system has not been specified. The ideal candidate will have experience with VHDL and control systems, and be able to work efficiently and accurately. Please provide examples of previous VHDL projects you have worked on.

I am seeking a technical writer and system improvement expert to help me with my project. Specifically, I need help with improving the software aspect of the system which includes C, Vivado, Python, and Ethernet. The ideal candidate should have experience with VHDL and ZedBoard at an intermediate level. The following skills and experience are required for this project: - Technical writing for system documentation - Knowledge of software (C, Vivado, Python, Ethernet) - Intermediate experience with ZedBoard and VHDL If you possess the above skills and experience, please apply for this project.

I am seeking a VHDL expert to help me implement a control system using VHDL. The purpose of this project is to implement a control system, and the specific type of control system has not been specified. The ideal candidate will have experience with VHDL and control systems, and be able to work efficiently and accurately. Please provide examples of previous VHDL projects you have worked on.

I am looking for an experienced Verilog or VHDL engineer to help me explain and design Number theoretic transform (NTT) which is the most efficient method for multiplying two polynomials of high degree with integer coefficients, using FPGA. The project has specific requirements and I will provide detailed specifications. The desired implementation platform is Xilinx FPGA using Vivado and the deadline for the project is 1-2 weeks. Ideal skills and experience for the job include Verilog or VHDL programming, FPGA design, and NTT knowledge.

Hello! I have 4-5 codes. available online. some of them have verilog and testbench codes. and some doesnot have the testbench. So, I need: I will apply the completed codes in my laptop, and if there is any error help me in fixing them. write the testbench codes if it does not found. helping me in understanding the codes I set 5 dollars for each completed codes (verilog,testbench) thanks

I have 5 verilog codes some of them need to write testbench and the others already have. The tasks: Help me in runing the codes, modifiing them if there is any errors. Write the testbench codes when needed Helps me in understanding the codes. No of coeds 5 I have the free source for the codes

Verilog Simulation and Testbench Modification Project I am looking for a freelancer who can assist me with a Verilog simulation project. Specifically, I need someone who can modify an existing Verilog code to create a basic level testbench. I have two codes: Clock divider, 7segemnt, and I need to apply them Required Skills and Experience: - Strong proficiency in Verilog programming language - Experience with Verilog simulation and testbench design - Familiarity with ModelSim tool or equivalent - Ability to communicate effectively and work collaboratively If you have the necessary skills and experience, please apply for this project.

how to program a microcontroller to read the room temperature from a sensor and control a DC motor, which is connected to a fan and also required to design a random access memory device in VHDL for the microcontroller.

Simulation and implementation of two players pong game under some constraints in Verilog.

Implementation of a Moore finite state machine with 2 - 4 D-FlipFlops simulating a control system. Design.v and testbench.v needed.

We are seeking a VHDL FPGA programmer to develop a program for data encryption and decryption with a high level of security. The ideal candidate should have experience in VHDL programming, FPGA design, and encryption/decryption algorithms. Functionality: - The program should provide high-security data encryption/decryption that meets the client's requirements. Encryption/Decryption algorithms: - The client needs suggestions for encryption/decryption algorithms that meet their high-security requirements. The ideal candidate should have experience in suggesting and implementing secure encryption/decryption algorithms. Level of security: - The client requires a high level of security for the encryption/decryption process. The ideal candidate should have experience i...

I will implement it in one week

I am looking for an experienced freelancer to work on an FPGA based project. The main goal of this project is performance optimization, and I am looking for someone with experience using the Xilinx platform, and coding in VHDL. I am looking for someone who can ensure that the project turns out as expected and meets all my requirements. Additionally, I would like the outcome of this project to have a positive impact on my organization's performance. The freelancer I choose must have in-depth and up-to-date knowledge of the FPGA architecture as well as memory control, interfaces, and system design. He/she should also possess excellent programming experience and be able to provide detailed reports and documentation in a timely manner. Moreover, I need assurance that this project...

Expand on the design of a single-cycle RV32I processor core called Archer, which implements most instructions of the RV32I base integer instruction set. Your the task will be to pipeline the processor and add hardware support for data forwarding and hazard detection.

Hello, I need code that turns on an 80% duty cycle when the feedback voltage drops below 1.5 V. I also need the voltage to be displayed on a LCD display. I need it coded in verilog to work with a DE-10 lite board.

Project for a simple security system design in System Verilog code, design and testbench.