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HLS Tools VHDL Expert C Programmer

About the manual RTL design approach is that mean i need scratch the RTL refer to the c code given or i can do manual modifications in the ready RTL (generate after synthesis)? Or depends to myself? Either both way also ok?

For the current moment, u r free to choose any method as long as u feel comfortable and the method is *efficient*, and meet the goal of *design optimization*.

Therefore, you can choose:

1. A structured way to modify the high level C code so that it could generate a more optimized design through the HLS tool.

2. Based on the generated RTL code by HLS tool, what is the structured way to modify the design to optimize the architecture to achieve better performance.

3. HLS setting configuration or modification.

4. Any method that is applicable.

no matter which option u choose, just make sure the methodology is well explored in a structured manner, and well documented and explained from ac-ademic perspective.

Kĩ năng: Lập trình C, Điện tử, Verilog / VHDL

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( 25 nhận xét ) Cheras, Malaysia

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5 freelancer chào giá trung bình$143 cho công việc này

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