a computer program in C++ that simulates the functioning of a hardware cache during a series of
read operations. Do this for 3 types of cache design:
• Associative Cache,
• 2-Way Set Associative Cache and
• Direct mapped Cache.
Assume that CPU has a 32-bit address bus and an 8-bit data bus. The cache will initially be empty. A
test file containing addresses is used as a test source. As each address is read from the file it is checked
against the cache entries. A cache hit should increments a hit counter. A cache miss results in a cache
line fill and an increment of a miss counter.
For each test address the program should output the resulting address in the form of a tag number, a set
number and a byte number. It should also indicate a hit or a miss, the status if the hit and miss counters
and in the case of a miss the line number of the data loaded from memory.
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