Conversion of NeTV device (Xilinx FPGA device) into a USB HDMI capture solution

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To complete this project you will need to purchase hardware, include a NeTV. **Make sure you include the cost of all hardware in your quote.**

The NeTV is a piece of Open Source hardware which takes a HDMI signal in and allows custom images and text to be overlaid on the image before output. More information about the device can be found in the detailed information section.

This project is to take the FPGA side of the system and change it into a USB based capture solution for HDMI and DVI. This task will require changes to both the Verilog code running on the FPGA and physical modifications to the board.

The result of this project will be released under the same licenses to the NeTV device it's based on.

* CC3.0-BY-SA license for PCB, mechanical design and schematics

* BSD license for all Verilog code

**This is an FOSS project, reusing compatibly sourced code is compatible is not only allowed,

but recommend!**

## Deliverables

# Conversion of NeTV device (Xilinx FPGA device)

into a USB HDMI capture solution

To complete this project you will need to purchase hardware, include a NeTV. **Make sure you include the cost of all hardware in your quote.**

The NeTV is a piece of Open Source hardware which takes a HDMI signal in and allows custom images and text to be overlaid on the image before output. More information about the device can be found in the detailed information section.

This project is to take the FPGA side of the system and change it into a USB based capture solution for HDMI and DVI. This task will require changes to both the Verilog code running on the FPGA and physical modifications to the board.

The result of this project will be released under the same licenses to the NeTV device it's based on.

* CC3.0-BY-SA license for PCB, mechanical design and schematics

* BSD license for all Verilog code

**This is an FOSS project, reusing compatibly sourced code is compatible is not only allowed,

but recommend!**

# Deliverables

To complete this task the following three deliverables will be required;

1. Verilog code which extends/modifies the existing NeTV code to;

1. Support DVI resolutions up to 1024x768.

2. Capture and compress the DVI or HDMI input into a MJPEG output stream.

3. Have a USB device stack for passing the MJPEG output stream to a USB host by acting as UVC compatible camera.

2. Instructions on how to modify a NeTV board to support HDMI/DVI capture; this should include;

1. Pictures of the rework required to connect the UTMI chip to the FPGA.

2. Pictures of the rework required to connect the UTMI to a USB cable.

3. Instructions on how to load your modified Verilog code onto the NeTV device.

3. A custom schematic and PCB board layout (including source files) which;

1. Removing the Marvell ARM chipset + wireless and related components.

2. Adds DVI connectors (as well as keeping HDMI connectors).

3. Adding a USB interface to the FPGA.

The deliverables will be tested by;

* following the instructions (the second deliverable) to modify a NeTV board and testing both 720P HDMI signal and <1024x768@85Hz> DVI signals can be captured by a Linux box using the stock UVC camera driver.

* a short run of the PCB boards (third deliverable) will be created and populated. This will then be tested with wide variety of both HDMI and DVI signals.

**Any problems in this QA will need to be rectified before final payment.**

# Milestones

As this project is reasonable large and complicated, a number of milestones will be required to be reached and are listed below;

1. > Stock NeTV FPGA firmware compiles and has been loaded onto your NeTV

2. > Add support for DVI resolutions to the NeTV

>

> This will be tested by downloading the new firmware into a stock NeTV and trying to use the overlay feature on a DVI signal via passive DVI->HDMI and HDMI->DVI changers.

3. Connect the FPGA to your UTMI interface.

**This milestone will require physical modification of the NeTV hardware.** This modification will need to be well documented so it can be reproduced as part of the second deliverable (Creating instructions on how to modify a NeTV board to support HDMI/DVI capture).

Some UTMI PHYs chips are listed below. They seem to mostly come in QFN packaging, so you'll probably want to get an evaluation board. **Final chip selection will need to be discussed, but any UTMI PHYs can be used during development.**

* <[url removed, login to view]>

* <[url removed, login to view]>

* <[url removed, login to view]>

1. Add basic USB device support to the FPGA code.

The FPGA should be able to connect to the USB socket of a Linux computer and via the UVC camera driver and produce a blank image. This will be tested on a standard Ubuntu computer with a NeTV device modified as described in step 3.

This step could reuse existing Open Source USB device cores, such as the ones listed below;

* [[url removed, login to view],listing?repname=usb&path=%2Fusb%2Ftrunk%2Fdoc%2F#][1][path_usb_trunk_doc][1]_

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* <[url removed, login to view]>

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* <[url removed, login to view]>

1. Capture, compress and deliver the captured HDMI/DVI signal to the host computer via the UVC camera driver.

This will be tested on a standard Ubuntu computer with a NeTV device modified as described in step 3 with both 720P HDMI signal and 1024x768@85Hz DVI signals can be captured by a Linux box using the stock UVC camera driver.

2. Initial schematics of the modified device.

3. Initial PCB layout, exact PCB specification will be determined after initial schematics are produced but are likely to be similar to the current NeTV specifications.

4. Final schematics of the modified device.

5. Final PCB layout.

# Further Work

After successful completion of this contact, there may be more work available in the future to extend this device. These features are **NOT** part of this contract.

* Continual maintenance and improvement of Verilog code to maintain compatibility with new HDMI and DVI standards.

* Adding support for capturing of VGA signals by adding a VGA DAC chip (such as <[url removed, login to view]>)

* Extending device to support capture from 1080P format devices.

* Adding software and hardware support for Display Port capture.

* Adding software and hardware support for HD-SDI capture.

* Adding software and hardware support for USB 3.0 interface.

* Further cost reduction and minimisation of PCB.

# NeTV Device

The NeTV can be purchased from AdaFruit at <[url removed, login to view]>

The device contains a Xilinx Spartan-3 FPGA to do the HDMI processing and a Marvell ARM chip to push the overlaid images into the FPGA. More information, including full schematics and Xilinx code can be found at the following URLs;

* <[url removed, login to view]>

* <[url removed, login to view]>

* <[url removed, login to view]>

# Notes

The major, but tangential, problem you'll encounter is that the overlay framebuffer's resolution support only matches those of major CEA resolutions. A laptop will generate resolutions that are decidedly not CEA compliant (i.e., nobody makes TV content at 1024x768), which as a pass-through the NeTV is perfectly fine to allow but we don't have the timings programmed to match that on the overlay. We handle that case by cutting the feed and forcing the NeTV into a self-timed 720p mode. For your purpose, you don't care because you aren't using the overlay, and in fact you'll want to kill the overlay timing matching algorithm, which is called "matchmoded". If you kill matchmoded then it will pass through any resolution connected on the input to the output.

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