Welcome to my Gig.
I will provide you Verilog or VHDL RTL solution for Xilinx/Intel FPGAs. The provided code will be synthesizable and with proper comments for understanding. I have actual hardware to verify the working of your project. I can also debug your project and remove the bugs for you.
I have worked on Xilinx 7 Series FPGAs and SOCs (Zynq, Artix, Kintex, and Spartan) and Lattice Diamond.
I have experience of designing the;
High-Speed ADC, DAC, Aurora, PCIe Interfaces
Communication Protocols Including UART, I2C, I2S, SPI, Ethernet, AXI
Video Interfaces VGA, HDMI, Camera Serial Interface
DSP, Frequency Estimation, FFT(Fast Fourier Transform)
Custom IP (Intellectual Property) Generation
DDR4 and DDR3 Interfaces
Transformation of Matlab Codes into Verilog HDL
I use different software to provide the best solutions:
Xilinx: Vivado, ISE, and SDK
Intel: Altera Quartus
Mentor: ModelSim, QuestaSim
TimeGen: Timing diagram
Fizz: State Machine Diagram FSM
Note: Kindly contact me before order! Thank you