Vasile T.

Experience in all stages of FPGA design, using Xilinx and Synopsis tool-chain o Background in low-power ASIC design, RTL coding in Verilog and VHDL o Performed ASIC verification trough both directed and functional methodologies o Exposed to mixed signal circuit design and analysis o Flexibility to move between hardware and software design o Working knowledge in DSP area, video processing and H.264 video compression o Experience in embedded programming