Overview: I do not just write RTL or embedded C. I am a Systems Architect who owns the verification and physical-world hardware integration. I solve the complex bottlenecks where software meets physics—timing drift, signal noise, and DFM/EMC compliance—so your system actually works in the real world, not just in a simulator. Specific Hardware & Silicon Expertise: FPGA & RF: Xilinx Zynq-7020, PYNQ, Digital Down Conversion (DDC) IP Cores, NCO/PLL architecture, HackRF, Autonomous SDR systems. Embedded SoCs: STM32 (H7/F4), ESP32-S3, ARM Cortex-M. Physical Layer: Altium Designer, High-Speed Signal Integrity, Thermal Analysis, DFM/DFA/EMC compliance for Defense and Medical hardware. Protocols & Architectures: * ACARS/ED137 ground station radio standards. * Zephyr RTOS & FreeRTOS deterministic task scheduling. * NIST Post-Quantum Cryptography for edge devices. * Edge AI (TinyML) inference pipelines under thermal constraints. **How I Work (The Guarantee):** When I deliver a Zynq IP core or an ESP32 firmware build, it comes with the "Ground Truth"—benchmark tables (latency, jitter, power draw) and physical oscilloscope verification. You are paying for risk reduction and guaranteed integration, not just lines of code.