Loganathan N.

As a RTL Design Engineer, I have well hands of experience in FPGA design development. I have a enough stuff in, # Serial and Parallel Communication Interface # State Machine Development # High Speed Data Interface like JESD204 # Interfacing with High Speed Data Converters (DAC & ADC) And also I have experience in Digital Signal Processing(DSP) algorithm development. I have hands of experience in # Wideband and Narrowband Digital Receivers # Digital Modulation and Demodulation Implementation # Digital Waveform Generation # ESM & ECM Products # Monitoring Receiver # Block Modulation - OFDM Development # Radar Interceptor Work experience in the following software tools, # Xilinx- ISE - ISIM # Xilinx- VIVADO # Intel - Ouartus # MATLAB - Script # MATLAB - Simulink - System Generator # Logisim