Verilog / VHDL Công việc và cuộc thi

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers.
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Dự án/Cuộc thi Mô tả Lượt đặt giá/Bài dự thi Kĩ năng Bắt đầu Kết thúc Giá (VND)
Simple Verilog code Write a simple verilog code to create dynamic lighting using led. see the attached files and respond 22 Lập trình C, Verilog / VHDL, Vi điều khiển, LabVIEW, FPGA Dec 15, 2017 Dec 15, 20174n ₫2863636
help me with modify some Verilog code know Verilog code, how how to use Quartus and FPGA board. 14 Verilog / VHDL, Vi điều khiển, Kĩ thuật điện, LabVIEW, FPGA Dec 15, 2017 Dec 15, 20173n 14g ₫568182
Program a microcontroller need you to program a micro controller as per my requirement 18 Điện tử, Verilog / VHDL, Vi điều khiển, Kĩ thuật điện, Arduino Dec 14, 2017 Dec 14, 20173n 1g ₫485209
Project for Loi L. Hi Loi L., I noticed your profile and would like to offer you my project. We can discuss any details over chat. 3 Điện tử, Verilog / VHDL, Kĩ thuật điện, , Thiết kế kĩ thuật số, Thiết kế vi mạch Dec 14, 2017 Dec 14, 20175n 18g ₫2431818
Implement a 16-bit CORDIC Computer It is to Implement a 16-bit CORDIC Computer. The design to be implemented is based on a bit-serial configuration. It will take as input a 16-bit signed binary fixed point number, corresponding to an angle in the range 0 to Ï€/2, and use the CORDIC method to find the sine and cosine of this angle. This will be coded in Verilog and implemented on the Basis 3 board. 3 Verilog / VHDL Dec 14, 2017 Dec 14, 20172n 13g ₫3863636
Simulink design of maximum power point algorithm with DC-DC Converter I want to hire a person which having the knowledge of matlab and simulink, and design the mppt algorithm associated with my idea. Also the person should have the knowledge of electrical like DC-DC converter, basic concept of solar cell, maximum power point algorithm. 23 Kĩ thuật, Điện tử, Matlab and Mathematica, Verilog / VHDL, Kĩ thuật điện Dec 14, 2017 Dec 14, 20172n 12g ₫3067760
Multiprocessor Scheduling in c++ -- 2 - 13/12/2017 14:32 EST -- 2 Inroduction: This project is about designing and simulating a clock-driven quad-processor scheduler in an object-oriented manner. The scheduler consists of a multi-level job queue where each level follows a different scheduling algorithm viz. Priority, Shortest Job First (SJF) and First-come-first-serve (FCFS). These queues will be enqueued with PCBs. The PCBs can further be classified into Rec... 5 Lập trình C, Điện tử, Verilog / VHDL, Vi điều khiển, Kĩ thuật điện Dec 13, 2017 Dec 13, 20172n 2g ₫477273
communication using simulink blocks update file of one user to five user 9 Kĩ thuật, Điện tử, Matlab and Mathematica, Verilog / VHDL, Kĩ thuật điện Dec 12, 2017 Dec 12, 20171n 5g ₫2818182
robust control project design a control system using matlab or simulink 15 Kĩ thuật, Điện tử, Matlab and Mathematica, Verilog / VHDL, Kĩ thuật điện Dec 12, 2017 Dec 12, 20171n ₫1059829
model in simulink i have model for one user i want update to 5 user and get some results 10 Kĩ thuật, Matlab and Mathematica, Verilog / VHDL, Kĩ thuật cơ khí, Kĩ thuật điện Dec 12, 2017 Dec 12, 201723g 3t ₫8522727
little project about emitter follower (manually and simulated) -- 2 - 11/12/2017 21:32 EST Help me to design the circuit attatched and find out the unkown parameters both 20 Kĩ thuật, Điện tử, Verilog / VHDL, Vi điều khiển, Kĩ thuật điện Dec 11, 2017 Dec 11, 20179g 2t ₫750000
Analogue & Digital Electronic Please, see the attached file. Analysis and design combinational and sequential digital logic, modeling concurrent digital systems using VHDL and Analogue filter. 18 Kĩ thuật, Điện tử, Matlab and Mathematica, Verilog / VHDL, Kĩ thuật điện Dec 11, 2017 Dec 11, 20173g 57t ₫4623564
multisim function generator hi i want someone to connect the function generator and the scope in multisim of electric circuit thank you 9 Kĩ thuật, Điện tử, Verilog / VHDL, Kĩ thuật điện, Thiết kế vi mạch Dec 11, 2017 Dec 11, 20173g 19t ₫522727
Simulink to VHDL I have done a controller for a battery energy storage system using Matlab Simulink. I need to generate VHDL codes for my controller. If you have NOT done that, please do not wast my time. 5 Điện tử, Matlab and Mathematica, Verilog / VHDL, Kĩ thuật điện, FPGA Dec 11, 2017 Dec 11, 2017Đã kết thúc ₫522727
Microprocessor Project using CodeWarrior Software Hi, Need the completed project in 36 hours. Share the codes in 24 hours and the report in 36 hours. Project details are attached here. Sample codes are attached in the files. You need to use the similar codes for the work 3 Kĩ thuật, Điện tử, Verilog / VHDL, Vi điều khiển, Kĩ thuật điện Dec 11, 2017 Dec 11, 2017Đã kết thúc ₫2272727
VHDL to Verilog Translation I have .vhdl files for an implementation of google chrome's 'dino run' which appears when the user has no wifi connection. However, I would like to have the same functionality with Verilog description language. 9 Verilog / VHDL Dec 10, 2017 Dec 10, 2017Đã kết thúc ₫2727273
simulation/ VHDL Expert Needed -- Urgent job -- b I need a simulation/ VHDL expert for my current project. If you have knowledge please bid. Details will be shared in message with the selected freelancers. 7 Kĩ thuật, Điện tử, Verilog / VHDL, Kĩ thuật điện, FPGA Dec 9, 2017 Dec 9, 2017Đã kết thúc ₫1249977
simulation/ VHDL Expert Needed -- Urgent job -- 3 I need a simulation/ VHDL expert for my current project. If you have knowledge please bid. Details will be shared in message with the selected freelancers. 3 Kĩ thuật, Điện tử, Verilog / VHDL, Kĩ thuật điện Dec 9, 2017 Dec 9, 2017Đã kết thúc ₫1032701
simulation/ VHDL Expert Needed -- Urgent job I need a simulation/ VHDL expert for my current project. If you have knowledge please bid. Details will be shared in message with the selected freelancers. 2 Kĩ thuật, Điện tử, Verilog / VHDL, Kĩ thuật điện Dec 9, 2017 Dec 9, 2017Đã kết thúc ₫801899
simulation/ VHDL Expert Needed -- Urgent job -- 2 I need a simulation/ VHDL expert for my current project. If you have knowledge please bid. Details will be shared in message with the selected freelancers. 2 Kĩ thuật, Điện tử, Verilog / VHDL, Kĩ thuật điện Dec 9, 2017 Dec 9, 2017Đã kết thúc ₫801884
simulation/ VHDL Expert Needed -- Urgent job I need a simulation/ VHDL expert for my current project. If you have knowledge please bid. Details will be shared in message with the selected freelancers. 0 Kĩ thuật, Điện tử, Verilog / VHDL, Kĩ thuật điện, FPGA Dec 9, 2017 Dec 9, 2017Đã kết thúc -
simulation/ VHDL Expert Needed -- 2 I need a simulation/ VHDL expert for my current project. If you have knowledge please bid. Details will be shared in message with the selected freelancers. 4 Kĩ thuật, Điện tử, Matlab and Mathematica, Verilog / VHDL, Kĩ thuật điện Dec 9, 2017 Dec 9, 2017Đã kết thúc ₫767761
simulation/ VHDL Expert Needed I need a simulation/ VHDL expert for my current project. If you have knowledge please bid. Details will be shared in message with the selected freelancers. 7 Kĩ thuật, Điện tử, Matlab and Mathematica, Verilog / VHDL, Kĩ thuật điện Dec 9, 2017 Dec 9, 2017Đã kết thúc ₫870130
DDR SD ram controller DESIGN AND TEST OF A DDR SDRAM INTERFACE FOR FPGA SYSTEMS Integrate and generate the IP core of DDR, then configure that IP Core, with DCM, PLL, FIFO, and some memory interface with State machine, possible to show the output of writing and reading the data,. with report of Area, power and delay,. Simulation in any standard simulator , Xilinx/Actel/libero 11 Điện tử, Verilog / VHDL, Vi điều khiển, Kĩ thuật điện, FPGA Dec 8, 2017 Dec 8, 2017Đã kết thúc ₫10159482
FPGA Implementation of FIR filter 1. FIR design and simultion in Matlab. 2. Implement in FPGA(Xilinx Virtex-6 LX240T) and inter-connect with other logic blocks. 3. define registers for FIR filter and gain setting such that user can download filter co-efficients and gain settings through software to FPGA. 24 Matlab and Mathematica, Verilog / VHDL, Kĩ thuật điện, FPGA Dec 7, 2017 Dec 7, 2017Đã kết thúc ₫17860540
need help with missile command game on de2-115 does anyone experienced with verilog have de2-115 I need help displaying a sprite on the screen. I have all the files. 4 Verilog / VHDL Dec 5, 2017 Dec 5, 2017Đã kết thúc ₫2886364
Expert in Xilinx (VHDL-BASED) An efficient Glitch power reduction using sequential clock gating in VLSI circuits 8 Verilog / VHDL Dec 5, 2017 Dec 5, 2017Đã kết thúc ₫3681818
Project for SqUa11 -- 2 3x3 Systolic array matrix using rom and ram 2 Kĩ thuật, Điện tử, Matlab and Mathematica, Verilog / VHDL, Kĩ thuật điện, Dec 4, 2017 Dec 4, 2017Đã kết thúc ₫272727
Embedded systems Develop a minimal system that contains a PC, a microprocessor board, and an FPGA board. With this system, a PC application allows a user to “awaken” (or “start up”) the FPGA board through the microprocessor board. Once (and only after) the FPGA board is awakened, it waits for a push button action. After the button is pushed, it sends an 8-bit value in bit-serial to the... 9 Điện tử, Verilog / VHDL, Vi điều khiển, Kiến trúc phần mềm, Arduino Dec 4, 2017 Dec 4, 2017Đã kết thúc ₫954545
Implementation of 32-bit MIPS Processor I need someone who knows MIPS Assembly Language and knows how to use the LogicWorks software to design a Single-cycle processor (see Figure 1 in attached document) and a Five-stage pipelined processor (see Figure 2 in attached document). Please keep all bids within the budget, otherwise you will not be selected for the project. 7 Lập trình C, Verilog / VHDL, Kiến trúc phần mềm, Lắp ráp, x86/x64 Assembler Dec 4, 2017 Dec 4, 2017Đã kết thúc ₫2659091
Write an article about UVM (universal verification methodology) Dear ASIC Verification Experts, I am looking for ghost writer who is from ASIC verification background. I want a unique article which tries to explain why we need to use UVM. The title of the article will be similar as this. "If SystemVerilog is so good, why do we need the UVM? " The article needed to be original and meaningful content. Please bid with your experience in ASIC ver... 26 Verilog / VHDL, Viết kĩ thuật Dec 4, 2017 Dec 4, 2017Đã kết thúc ₫2227273
putty language i need someone who can do putty and verilog 7 Kĩ thuật, Verilog / VHDL, Kĩ thuật điện, Lắp ráp Dec 4, 2017 Dec 4, 2017Đã kết thúc ₫2522727
Verilog Work I need some work done in verilog using Quartus 2 version 13 12 Verilog / VHDL Dec 3, 2017 Dec 3, 2017Đã kết thúc ₫3295455
putty coding language need an electrical engineer or computer engineer with background in putty language coding 3 Verilog / VHDL, Kĩ thuật điện, Coding, Programming Dec 3, 2017 Dec 3, 2017Đã kết thúc ₫636364
Need a Cadence design to design a amplifier circuit. Need a Cadence design to design a amplifier circuit. details will be share in chat box. 21 Kĩ thuật, Điện tử, Verilog / VHDL, Kĩ thuật điện, Thiết kế vi mạch Dec 3, 2017 Dec 3, 2017Đã kết thúc ₫565788
Design of MIPS Datapath components Using Logisim Course: Computer Organization and Architecture Project: Design of MIPS Datapath components Using Logisim Objectives After completing this project you will: · Design a 32x 32 bit register file · Design a 32 bit arithmetic and logic unit (ALU) Register File The register file consists of 32 x 32-bit registers and has the following interface as shown in Figure 1: _ BusA and BusB... 10 Kĩ thuật, Điện tử, Verilog / VHDL, Thiết kế vi mạch, FPGA Dec 2, 2017 Dec 2, 2017Đã kết thúc ₫1022727
MATLAB code- a bit-serial CORDIC computer in Verilog MATLAB code a bit-serial CORDIC computer in Verilog to compute the sine and cosine of an angle θ. I will share the additional details later 15 Matlab and Mathematica, Verilog / VHDL Dec 2, 2017 Dec 2, 2017Đã kết thúc ₫1409091
Digital Design with Logic Devices It is a Project on Digital Design with Programmable Logic Devices. I will provide details later. 10 Verilog / VHDL Dec 1, 2017 Dec 1, 2017Đã kết thúc ₫1181818
pls help ac homewokr :'( i need log synchronous sequential circuit that solves a 64x64 maze using the right wall follower algorithm. how much???? u have 3 hours 8 Kĩ thuật, Điện tử, Matlab and Mathematica, Verilog / VHDL, Kĩ thuật điện Dec 1, 2017 Dec 1, 2017Đã kết thúc ₫1888618
Project for Gabriel G. Hi Gabriel! I'm working on my capsim simulation final and I got myself into a lot of debt and don't know how to fix it . I need a 70% on this and was wondering if you'd be able to help. Im currently on the 3rd round of 4. Would you be able to help me out? You were suggested by a classmate and was wondering if you'd be able to help me even though I already am on round 3. Thank... 2 Quản lí dự án, Tiếp thị từ xa, Excel, Matlab and Mathematica, Verilog / VHDL, Dec 1, 2017 Dec 1, 2017Đã kết thúc ₫3340909
design and implementation of a MIPS CPU with Multi cycle Data path design and implementation of a MIPS CPU with Multi cycle Data path using the VHDL language 14 Lập trình C, Verilog / VHDL, Lập trình C++, Lắp ráp, FPGA Nov 30, 2017 Nov 30, 2017Đã kết thúc ₫3568182
bubble level project the project must be developed in verilog to be executed on the Nexys4DDR ™ FPGA Board. In the video attached in the .zip, the operation of the project 8 Verilog / VHDL, FPGA Nov 29, 2017 Nov 29, 2017Đã kết thúc ₫1886364
VHDL code for Pipe lined MIPS-RISC (5 stage) processor.(Code for Un-pipelined will be given) I need you to do pipelining for the MIPS-RISC (5 stage) Processor. I will give you the MIPS processor code, all you need to do is pipelining. I will upload the file once go through it. If you are interested, I will send you the code and question for which code has written.” Deadline is " Dec-03-2017 " 12 Lập trình C, Kĩ thuật, Verilog / VHDL, FPGA, Parallel Processing Nov 29, 2017 Nov 29, 2017Đã kết thúc ₫3909091
logic analyiser and waveform viewer The data collection is done on the FPGA board. A microprocessor gets data from the FPGA board and sends data to the PC through either a Bluetooth modem or a USB port. The system supports one analog channel and one digital channel, with a single-level triggering. Only 8 bits of precision will be used for the analog channel. •Phase 1: Develop a minimal system that contains a PC, a microproce... 6 Điện tử, Verilog / VHDL, Vi điều khiển, Kiến trúc phần mềm, Arduino Nov 27, 2017 Nov 27, 2017Đã kết thúc ₫7318182
interface hardware module with amber processor -- 2 - 27/11/2017 11:51 EST to implement an interface hardware module with amber processor 2 Verilog / VHDL Nov 27, 2017 Nov 27, 2017Đã kết thúc ₫4795455
Network traffic processing using two FPGAs I want to get throughput and latency results of network traffic(Ethernet packets processing) using two FPGAs, while i have throughput and latency results of using one FPGA, so i want to compare both these results. The results of using two FPGA chips should be better than using one FPGA. 6 Kĩ thuật, Verilog / VHDL, Kĩ thuật điện, Quản trị mạng, FPGA Nov 26, 2017 Nov 26, 2017Đã kết thúc ₫15340909
C++ based project - open to bidding cpp dependencies sorting out, we will provide you the structured file and the source code and you have to compile and run after sorting mugs from that 16 Điện tử, Verilog / VHDL, Lập trình C++, Arduino, RTOS Nov 25, 2017 Nov 25, 2017Đã kết thúc ₫2454545
Design and test a VHDL model for the instruction cache of a speculative out of order VLIW processor. Design and test a VHDL model for the instruction cache of a speculative out-of-order VLIW processor. Your VHDL code should have the following: - PC register updated on falling_edge of the clk to one of the following values: PC + VLIW_INST_SIZE, branch_target_PC, or EXCEPTION_ROUTINE_PC. PC register should be initialized to 1000 Hex when reset is active. Assume that the project ISA requires EXCE... 3 Verilog / VHDL Nov 25, 2017 Nov 25, 2017Đã kết thúc ₫8204545
System verilog - open to bidding I need a task to be completed on system verilog, please confirm if you can do. ThanksI need a task to be completed on system verilog, please confirm if you can do. ThanksI need a task to be completed on system verilog, please confirm if you can do. ThanksI need a task to be completed on system verilog, please confirm if you can do. Thanks 10 Lập trình C, Verilog / VHDL, Lập trình C#, Lập trình C++, FPGA Nov 23, 2017 Nov 23, 2017Đã kết thúc ₫242043
interface hardware module with amber processor to implement an interface hardware module with amber processor 2 Verilog / VHDL Nov 23, 2017 Nov 23, 2017Đã kết thúc ₫681818
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