Lattice cpld vhdlcông việc

need to implement neural networks in vhdl. More details will be shared in discussions

using Artix 7 implement Master UFS protocol design for the UFS Host device, Feel free to contact who's have experince on Stroage's(emmc, ufs, nand e.t.c) Skills required : Verilog , VHDL , C

I'm looking for a Freelancer to help me find out VHDL code for designing crossy road game. I already have a detailed plan that I'd like to have implemented, so I need someone who can understand what I'm looking for and execute the plan quickly and accurately. This is a micro project ,so I need someone who is willing to help me to get a vhdl designing code for crossy road game. If you think you have the expertise to handle a project like this, please reach out to me and let me know how you can help. Thank you for your time and consideration.

I am seeking assistance with designing both an ALU and memory modules for my project. I require help with both coding and design aspects. Specific tasks for this project include: - Designing ...assistance with designing both an ALU and memory modules for my project. I require help with both coding and design aspects. Specific tasks for this project include: - Designing an ALU - Designing memory modules Ideal skills and experience for this job include: - Proficiency in VHDL programming language - Strong knowledge and understanding of ALU and memory module design - Experience in both coding and design aspects of similar projects If you have experience in designing ALU and memory modules and are proficient in VHDL programming language, I would like to discuss this project ...

I am in need of an intermediate FPGA VHDL designer who can assist me with designing a small module. This project requires someone with experience and expertise in VHDL programming for FPGAs. Skills and Experience: - Proficiency in VHDL programming for FPGAs - Experience with designing small modules - Strong understanding of FPGA architecture and design principles The project has a tight deadline, with completion expected within the next 1-2 weeks. Therefore, it is important for the freelancer to be able to work efficiently and deliver high-quality work within this timeframe. If you have the necessary skills and experience in FPGA VHDL design, and are able to meet the project requirements within the specified timeframe, I encourage you to apply for this proj...

design of a VHDL synthesizable module to implement data exchange between firmware and software on a KRIA SOM module

I am looking for a skilled individual to explore the effect of alloying on the lattice parameters and stacking fault energies in FCC using Axial Nearest neighbour Ising (ANNI) and diffuse multi-layer fault (DMLF) models. Specific Alloys: Co-Fe-Ni Lattice Parameters and Stacking Fault Energies: I am open to any results and do not have specific values in mind. Preferred Modeling Software: I have a specific software in mind. Ideal Skills and Experience: - Proficiency in utilizing Axial Nearest neighbour Ising (ANNI) and diffuse multi-layer fault (DMLF) models - Strong knowledge of FCC alloy systems, particularly Co-Fe-Ni - Experience in investigating lattice parameters and stacking fault energies - Familiarity with the specific software (to be provided) for modeling ...

For this project, am looking to create a system design for the game Beer-Pong using a combination of BASYS 3 and additional components compatible with BASYS 3 and VHDL. I want the system design to have a basic level of complexity with a specified deadline of 3 weeks for completion. Different components like switches, LEDs and sensors. The aim of this project is to design a system for the game Beer-Pong using BASYS 3 and components that are compatible with BASYS 3. In this project, we will be able to play advanced beer- pong. Our setup will consist of 6 cups in total, and the aim is to throw three balls out of 5 into adjacent 3 cups Balls must perform a straight line). Thus, at that point, our game differs from the classical game. Positions of the cups can be adjusted since the playe...

...assist me with an Axi Ethernet 1G base project for Xilinx KCU116, which is a Kintex Ultrascale. Project MUST NOT CONTAIN Microblaze, only soldi VHDL code. Target Device: Target device is Kintex Ultrascale+, as KCU116 board will be the target device for the project. Intended Functionality: The main objective of this project is to develop a networking solution using Ethernet. The freelancer should be experienced in VHDL developments and in networking functionalities for Xilinx KCU116. Specific Requirements: - 1/2.5GB Axi Ethernet Core (not provided, but free trial is available by Xilinx) based - 1Gb speed required - No Microblaze or MPSoC, only VHDL code. - Configuration must be done by AXI-Lite bus (No Configuration vector) - Ethernet frames must be sent by AXI-St...

For this project, I am looking to create a system design for the game Beer-Pong using a combination of BASYS 3 and additional components compatible with BASYS 3 and VHDL. I want the system design to have a basic level of complexity with a specified deadline of 3 weeks for completion. Different components like switches, LEDs and sensors. The aim of this project is to design a system for the game Beer-Pong using BASYS 3 and components that are compatible with BASYS 3. In this project, we will be able to play advanced beer- pong. Our setup will consist of 6 cups in total, and the aim is to throw three balls out of 5 into adjacent 3 cups ( Balls must perform a straight line). Thus, at that point, our game differs from the classical game. Positions of the cups can be adjusted since...

Create a simple yet effective Smart Home Energy Monitor using your expertise in electrical engineering and FPGA/VHDL. This project aims to help working individuals monitor and optimize their home energy consumption. It can be both fun and practical.

I am looking for a freelancer who can help me import an Abaqus mesh file into ANSYS ...Experience: - Proficiency in working with Abaqus mesh files and ANSYS Workbench. - Knowledge of the .inp file format. - Familiarity with importing and working with different file formats in ANSYS Workbench. - Experience in troubleshooting and resolving any compatibility issues between Abaqus and ANSYS Workbench. I want to import the Abaqus mesh file to the Ansys workbench for static structural (lattice structure). I want to implict the non-linear isotropic hardening voce law from the experimental stress-strain curve. if anyone has good knowledge in this work, please contact me If you have the required skills and experience in importing Abaqus mesh files into ANSYS Workbench, please submit your...

...Cisco ASR 1004 rp2 Software and Romon,cpld,fpga Update Description: I am looking for a skilled professional who can assist me in updating the software and components of my Cisco ASR 1004 rp2 device. The main focus of this project is to update the software, Romon, cpld, and fpga. Current Software Version: I am not sure, please check for me. Specific Features/Fixes: I am not sure, please recommend. I am open to suggestions on the latest version and any specific features or fixes that would enhance the performance and functionality of my device. Backup: Yes, I have a backup of my current configuration and data. Ideal Skills and Experience: - Strong knowledge and experience with Cisco ASR 1004 rp2 devices - Expertise in updating software, Romon, cpld, and fpga co...

We are currectly looking for support to write a simple motor model in VHDL, that will be used to test our motor controller in FPGA. The motor model shall be as simple as possible and an equivalent Matlab/Octave/Python/C/C++ model would be desiderable and used to validate the VHDL model

requiring the design of a VHDL synthesizable module to interface an incremental encoder. This is generic ABZ quadrature decoder, some code woulc also be found on the net already, that requires integration and testing () The encoder is the Z is for homing (it marks the zero position of the encoder) specs and deliverables in the attached document

I am in need of an expert with FPGA Verilog/VHDL experience in Xilinx. The project requires advanced programming skills in Verilog/VHDL and must be completed within a week. You should have a Xilinx board to work on this project. Tasks: - Programming in Verilog/VHDL Ideal Skills and Experience: - Expertise in FPGA Verilog/VHDL - Strong knowledge of Xilinx - Advanced programming skills in Verilog/VHDL Deadline: - Within a week

I am looking for experts in Xilinx VHDL to be a part of my team and work with me on various projects. I need dedicated experts who can work in tight deadlines too I would encourage new freelancers too to place bid and have a communication with me

I am looking for experts in Xilinx VHDL to be a part of my team and work with me on various projects. I need dedicated experts who can work in tight deadlines too I would encourage new freelancers too to place bid and have a communication with me

I am looking for a freelancer who can develop a VHDL test pattern generator with the following requirements: Configurable output order configurable pattern configurable pixel per clock test in simulation only

hi, i'm searching for an experienced in Matlab and VHDL i have a code written in matlab and it's calling some functions that also written in matlab and i want to convert the code into VHDL if you can convert it please bid on this project

Hello I have a project written in Matlab, I need to convert this code to VHDL by using Vivado.

...to help with a project involving Xilinx FPGA development. I am using the Xilinx Zynq-7000 board and the main function of the board in my project is to process data. I need help with both hardware design and software development for this project. The qualified candidate should have significant expertise in hardware design and software development for FPGA systems. Excellent knowledge of C/C++ and VHDL for FPGA design/programming is also necessary. The candidate should be able to understand and utilize various types of FPGA peripherals and interfaces including, but not limited to, SPI, I2C, UART and Ethernet. Working knowledge of the Zynq-7000 series FPGA board and its associated software/tools (e.g. the Xilinx Vivado Design Suite) is also a requirement. Finally, the qualified cand...

I am looking for an experienced VHDL programmer to help with a complex project. The timeline for this project is within a week, so it will require an experienced programmer who is able to work very quickly. I have detailed requirements that need to be satisfied, and I will be expecting a high-quality result. The project is an advanced level project, so I need someone who is comfortable working with complex VHDL code. If you think you can complete this project in the timeline given, please message me!

Project Description: Can you help me with a mini spectrum analyzer using FPGA the results will be on a pc screen with GUI that the user can put markers on and change the resolution, to make a spectrum analyzer with FFT algorithm on FPGA Using UI the user can control the span a put markers. The user will be able to change parameters in a user interface. The ADC is the sampling. The FPGA is going to calculate the FFT. The all idea is to mini spectrum analyzer (the measurement device). Block chain 1. ADC for sampling 2. FPGA to calculate the FFT and sent it to the pc display

I am looking for a freelancer to help with hardware verification. Specifically, I would like someone to verify a VHDL model od SHA3 in SystemVerilog using the UVM (Universal Verification Methodology). This project will also require executing fewer than 10 verification test cases. I have semi-built UVM template to send.

My experience with deploying Caffe networks on FPGA boards is intermediate. I have prior experience with the Lattice Radiant software so I am ready to use it for this project. My specific task or outcome I want to achieve with this deployment is Image Classification using the ICE40UP5K FPGA with the iCE40 UltraPlus Breakout Board and Lattice Radiant software.

My experience with deploying Caffe networks on FPGA boards is intermediate. I have prior experience with the Lattice Radiant software so I am ready to use it for this project. My specific task or outcome I want to achieve with this deployment is Image Classification using the ICE40UP5K FPGA with the iCE40 UltraPlus Breakout Board and Lattice Radiant software. Details: 1, I already built a caffe network, just need to deploy it 2, the input of the caffe network is supposed to be an image but right now the input of the caffe network are 32x32 matrix and output will be 1 or 0. I want to test that with deploy the model on ICE40UP5K 3, I will provide the network file, and the final result will be a project file and can use my caffe network, have hardcode a 32x32 matrix and output ...

...control systems. I'm using the Altera Cyclone V board and the preferred programming language is Verilog. This project requires someone with experience in FPGA programming and the design of embedded systems. The programmer should be able to develop design flows for FPGA devices, debug them and modify existing designs for better performance. The knowledge of hardware description languages such as VHDL and Verilog is crucial, as they will be used for implementation and testing of the designs. Additionally, some knowledge of microcontrollers and communication protocols will be required. The right person for this job should have strong problem-solving skills, excellent coding and debugging capabilities, and a deep understanding of hardware interfaces and hardware design principle...

...Remove completely the bottom all the bottom façade cladding under ground floor window. This will just remain stucco and save some money. o Extend the metal lattice vertically a little higher. This way it will cover a) the area where the existing green diamond is (that you are removing) and b) the area where the existing old Harbor View lettering which you are removing. 3 options to extend upwards a) extend lattice upward to bottom of grey wood header under clay roof, b) extend lattice upward to top of new grey façade sign, c) extend lattice upward to top of 2nd floor windows. Choose where it would look good to extend the metal lattice upward to…. ...

I need an image of a building to have a shipping container added to the image to show street scaping options. PHOTO EDITING 1 image of the external (building to be provided) Option 1 - Add in the shipping container (40ft) Option 2 - Add batton fencing overlay & plants Option 3 - Add lattice and vertical edible garden Option 4 - Different colours of the shipping container

Project Title: Altera DE0 Board Programming Assistance Description: I am seeking a freelancer who can provide programming assistance for my Altera DE0 board project. I require expertise in VHDL programming language and the ability to modify existing code as well as start from scratch. Skills and Experience: The ideal candidate for this project should have: - Proficiency in VHDL programming language - Experience with Altera DE0 board - Strong troubleshooting and debugging skills - Knowledge of hardware design consultation Specific requirements: - Provide programming assistance for the Altera DE0 board - Modify existing code and develop new code from scratch - Troubleshoot and debug any issues that arise during the programming process - Provide hardware design consultation a...

I am looking for a skilled programmer to work on the video processing project involving the GS2962 and GS2961 ICs. Programming Language: - Proficiency in VHDL programming language is required for the IC programming. Functionality: - The primary function of the programmed ICs should be video processing. Hardware Compatibility: - The IC programming should be compatible with specific hardware that I have specified. Ideal Skills and Experience: - Strong knowledge and experience in programming with VHDL language. - Expertise in video processing and working with ICs. - Familiarity with GS2962 and GS2961 ICs. - Ability to ensure compatibility with specified hardware. Please provide examples of previous projects related to video processing and IC programming when submittin...

We are searching for support on debug test and addition of a couple of features to a project we developed last year The board is a synchronous (with GPS PPS signal) acquisition from 7 ADCs. The clock is generated internally from a PLL, locked to the PPS. Lattice ECP5 on a custom board There are 2 external interfaces to an IMx6 SPIM: Spi Slave, the Master is a Imx6 processor, which is used to write and read internal registers and ADC’s registers. Details on the protocol in the FDD SPIS: Si Master, the data acquired from the ADCs are packed and sent to the external IMx6 Modifications ADD MEMS Accelerometer, ADXL355 channel modify the data stream, adding 8th channel. A review of protocol might be needed ADD Registers to control DAC and discretes ADD DAC. We can share a DDS to ge...

I am looking for a skilled ARM embedded freelancer to assist with ...of the Embedded System: - Personal project Hardware and Software Requirements: - I have specific requirements Ideal Skills and Experience: • Good grasp of fundamentals in Electronics Engineering, • Knowledge of digital electronics, VLSI, microprocessor architecture is a plus • Interest and experience in digital design and verification • Good understanding of Assembly-level programming, Verilog/VHDL • Proficient in C/C++, and scripting languages - Strong knowledge and experience in ARM microcontroller programming - Proficiency in real-time operating system (RTOS) development - Expertise in embedded system design and implementation - Familiarity with the specific hardware and software req...

... Land map given in drawing 1/ along with General map. Then comes the drawings of the for main buildings disposed around the central garden. Building V is the entrance to this main central garden. We have then a simple arch positioned in the garden The last two drawings are about the pool and awning that are in yheong corridor leading into the central land. Pics to be used as follows We use lattice (see through) for Windows. The first 9 pics are about those various types . They are listed as type A to type I below although F has 8 sub types F1 to F8 from top left corner to bottom right. General land In front of I, brick enclosure VI with trees as per pic 10 Near garden entrance arch VI as as per drawing 1 and 15 Building I Master / chủ Colours : main dark yellow aisles ligh...

I am looking for a skilled VS code extension developer who can create a language support extension for VHDL/Tcl. The ideal candidate should have experience in developing VS code extensions and have a strong understanding of external tasks. Requirements: - Proficiency in developing VS code extensions - Familiarity with the VS code extension development process - Ability to create a language support extension We have a language support extension already, that support VHDL and Tcl programming language. we need support to add tasks to the extension, to call external scripts. more details in following communications

I am looking for an experienced FPGA developer to help me with a project. The desired application for this project is Embedded Systems and the software preference is Telecom, which I need to be completed within 1 month. The expertise of the developer should be suitable for this type of development, and must have experience with Xilinx Vivado, Intel Quartus or Lattice Diamond. Time is of the essence, so I’m looking for someone who can hit the ground running and begin the project as soon as possible. If you feel you have the necessary skills and experience for this project, I look forward to hearing from you.

...Structural Engineering Design Trainer for Electrical Transmission and Distribution Substation/ Switchyard projects. This project requires someone with experience in designing and analyzing of structures and foundations/column/beam/slab. The specific area of civil and structural engineering I need training in includes designing tower foundations, equipment foundations, industrial buildings, and lattice structures for Towers and Equipment supports in Switchyards. Additionally, I require the trainer to have knowledge of using software such as STAAD Pro. Thus, it is necessary that the candidate have proficiency and experience using this specific type of software. For this project, I expect the trainer to be able to explain complex principles in structural engineering and be able to p...

Task description. we have a fork of a VScode extension which we customized (modifying snippets and some minor modification) This should be extended, we want to create an extension to be used internally to the company by every FPGA designer the extension shall support VHDL and Tcl (snippets and language syntaxes files are there already) Add Tcl language support (, ) but we would like to add the capability to call external Tcl scripts, right clicking on a vhd file in the Explorer Tab

I am looking for a skilled VS code extension developer who can create a language support extension for VHDL/Tcl. The ideal candidate should have experience in developing VS code extensions and have a strong understanding of external tasks. Requirements: - Proficiency in developing VS code extensions - Familiarity with the VS code extension development process - Ability to create a language support extension We have a language support extension already, that support VHDL and Tcl programming language. we need support to add tasks to the extension, to call external scripts. more details in following communications

Here is what we need: create a 3 D realsitic rendered chip in an explosive way that has 4 layers. The 4 layers should demonstrate the following (bottom to top): Layer: that are photonic layer (slide 3) Layer: lattice of atoms with spin (arrows) (slide 4) Layer: electronic (metalized electrodes and transmission line) and magnetic (a ferromagnetic material generating fields). The outcome should be 4 images: Picture 1: explosive chip with 4 layers (slide 2) Picture 2: showing the 4 layers by cross sectioning the corner (slide 2) Picture 3: a series of images where layer by layer gets added explosive chip with 4 layers Picture 4: a series of images where layer by layer gets added --------------------------- - I would need this images in phot realistic 3D rendering, but potent...

...structural industry - Creative and able to bring our specific design elements and images to life - Attention to detail and ability to create a logo that represents our company's values and expertise Logo Concept: Icon: Incorporate an abstract representation of a chromium atom or molecule. This could be depicted as a series of interconnected spheres or a hexagonal pattern resembling a crystal lattice, symbolizing the chemical aspect of the solutions provided. Construction Elements: Integrate subtle construction-related elements like beams, pillars, or girders within the chromium atom/molecule structure. This will help represent the company's focus on providing solutions for construction needs. Color Scheme: Use shades of blue or green to represent stabili...

Hi Edgar G., We need a tcl script to create block design from VHDL, FSM representation with states and transitions (with conditions), and process interconnection. This will be needed for documantation of VHDL projects consider splitting the diagram in sub diagrams for very dense diagrams, where the readability will be compromised byt the vast number of blocks and connections. the output shall be in an editable format.

Online forum dissemination and flyers The goal of this task is to "disseminate" our products and solutions on the web example: lets suppose we have our "axi register vhdl generator" module which generates VHDL module and package, C header and function to read/write registers, and html documentation. All this automatically from a tcl script or a web interface We would need to search on the web (in forum for instances) people looking for that thing and reply, sending a message, with the link to our solution This should be done, possibly, automatically, to capture the message as soon as it is published and reply immediately (replying after 2 years is not good, though it is still valid as the link will still be present and someone might go to serach and ...

I am in need of an FPGA VHDL expert for a design and implementation project. Skills and experience required: - Expertise in FPGA VHDL design and implementation - Strong knowledge of digital design and verification - Proficiency in troubleshooting and debugging FPGA designs Successful freelancers should include their experience in their application, showcasing their past work and relevant projects they have worked on. The desired turnaround time for the project is 2-4 weeks.

Project Description: I am looking for an experienced FPGA developer to implement a PL UART communication module on a Zynq FPGA. The project requires the following skills and experience: - FPGA development experience, specifically with Zynq FPGAs - Knowledge of UART communication protocols - Proficiency in HDL programming languages such as Verilog or VHDL - Ability to implement custom baud rates for UART communication - Experience with interrupt handling in FPGA designs - Strong understanding of intermediate level communication requirements The main objectives of the project are: - Implementing a PL UART module on a Zynq FPGA - Supporting selectable baud rates for UART communication - Triggering an interrupt after a successful transmission - Ensuring reliable and efficient communi...

We are looking to replace a Graphics LCD display with 320x200 pixel resolution using a SED1330/1335 Controller with a modern TFT or OLED based solution with 400x300 pixel resolution . The scope of the project will be to suggest a low power ,MCU suitable for this task or a FPGA/CPLD based solution , develop and debug the code to convert the data from the SED1330 commands to serial commands the new display can process and scale the data to fit the higher screen resolution . All hardware design will be performed by us

I need an experienced programmer to write FPGA test code for an upc...am using. As this project requires moderate complexity, it is essential that the person I choose has a sound knowledge and understanding of FPGA programming. The code I am looking for is interface testing code for Audio IC (Audio Codac Part No: ADAU1761) with FPGA. Problem Statement:- We have to test the Audio interface of our customized FPGA board(FPGA PART No: XC7K325T-2FFG676I), so we need a VHDL/Verilog code for Audio IN/Out. Means, when we give input from Mic in audio in, same will be transferred to Audio out which we will hear from speaker. If you think you have the qualifications, tools and knowledge necessary to craft the code, please do not hesitate to bid on the project. I look forwa...

I am looking for a freelancer who understands shoes, for small repairs to 3D files of an existing pair of shoes including adjusting the shoes to 3 additional sizes (I have the required lasts in STL format). Beyond fixing and adjusting the sizes, I also need him to know how to embed an Lattice structure into them according to the structure I already have.

Need to write the content as an assistant ( text only for a mathematic book for grade 4 ) covering following subjects, writer should be creative enough to create Su...Subtraction Facts, Addition and Subtraction Together, Checking Subtraction by Addition Problem Solving, finding the Missing Number Estimating the Difference Chapter 4 Multiplication Multiplicand. Multiplier, and Product Properties of Multiplication, Quick Ways to Multiply, More Products Using Multiplication Tables, Multiplication by a 2-digit,Multiplier,Multiplication by a 3-digit Multiplier,Lattice Multiplication,Word Problems Chapter 5 Division Dividend, Divisor, and Quotient Properties of Division,Division Patterns Long Division,Learning Division by Short Division Method Word Problems, Estimating the Quotient,Unit...